[Github-comments] [geany/geany] Create filetypes.SystemVerilog.conf (#1831)

[elextr]

If all you want is to treat .sv extension as verilog, just add it to your filetype.extensions under verilog=

-- 
You are receiving this because you are subscribed to this thread.
Reply to this email directly or view it on GitHub:
https://github.com/geany/geany/pull/1831#issuecomment-381877128
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.geany.org/pipermail/github-comments/attachments/20180417/8cb78e51/attachment.html>