[Geany-Devel] Adding SystemVerilog Parser
Joshua A. Einstein-Curtis
jeinstei at xxxxx
Wed May 3 13:23:21 UTC 2017
Hi Geany developers,
I'm locally am updating the Verilog parser/creating a SystemVerilog parser with updated keywords and kinds. I don't know if anyone has already started this, but if so, I'd be interested in working off of a base.
Do we have a standard for changing file headers while still attributing original file creation correctly?
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