[geany/geany] 739661: Add R and Verilog to languages reporting context

[Jiří Techet]

Branch:      refs/heads/master
Author:      Jiří Techet <techet at gmail.com>
Committer:   Jiří Techet <techet at gmail.com>
Date:        Mon, 14 Mar 2022 19:10:07 UTC
Commit:      7396613f0b40830cf858c5e51dda71590ad06162
             https://github.com/geany/geany/commit/7396613f0b40830cf858c5e51dda71590ad06162

Log Message:
-----------
Add R and Verilog to languages reporting context


Modified Paths:
--------------
    src/tagmanager/tm_parser.c

Modified: src/tagmanager/tm_parser.c
2 lines changed, 2 insertions(+), 0 deletions(-)
===================================================================
@@ -1114,11 +1114,13 @@ gboolean tm_parser_has_full_scope(TMParserType lang)
 		case TM_PARSER_PHP:
 		case TM_PARSER_POWERSHELL:
 		case TM_PARSER_PYTHON:
+		case TM_PARSER_R:
 		case TM_PARSER_RUBY:
 		case TM_PARSER_RUST:
 		case TM_PARSER_SQL:
 		case TM_PARSER_TXT2TAGS:
 		case TM_PARSER_VALA:
+		case TM_PARSER_VERILOG:
 		case TM_PARSER_ZEPHIR:
 			return TRUE;
 



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