[geany/geany] e469aa: Update VHDL parser to display blocks in the symbols list
Miguel Sánchez de León Peque
git-noreply at xxxxx
Sun Sep 2 17:42:25 UTC 2012
Branch: refs/heads/master
Author: Miguel Sánchez de León Peque <msdeleonpeque at gmail.com>
Committer: Colomban Wendling <ban at herbesfolles.org>
Date: Sun, 02 Sep 2012 17:42:25
Commit: e469aa27e06b33e2db0a98bc8d0a969b4b47612b
https://github.com/geany/geany/commit/e469aa27e06b33e2db0a98bc8d0a969b4b47612b
Log Message:
-----------
Update VHDL parser to display blocks in the symbols list
Modified Paths:
--------------
src/symbols.c
tagmanager/ctags/vhdl.c
Modified: src/symbols.c
2 files changed, 1 insertions(+), 1 deletions(-)
===================================================================
@@ -855,7 +855,7 @@ static void add_top_level_items(GeanyDocument *doc)
&(tv_iters.tag_type), _("Types"), "classviewer-other",
&(tv_iters.tag_function), _("Functions / Procedures"), "classviewer-method",
&(tv_iters.tag_variable), _("Variables / Signals"), "classviewer-var",
- &(tv_iters.tag_member), _("Processes / Components"), "classviewer-member",
+ &(tv_iters.tag_member), _("Processes / Blocks / Components"), "classviewer-member",
&(tv_iters.tag_other), _("Other"), "classviewer-other",
NULL);
break;
Modified: tagmanager/ctags/vhdl.c
7 files changed, 5 insertions(+), 2 deletions(-)
===================================================================
@@ -44,6 +44,7 @@
K_ENTITY,
K_ARCHITECTURE,
K_PORT,
+ K_BLOCK,
K_ALIAS
} vhdlKind;
@@ -77,6 +78,7 @@
{ TRUE, 'n', "class", "entity" },
{ TRUE, 'o', "struct", "architecture" },
{ TRUE, 'u', "port", "ports" },
+ { TRUE, 'b', "member", "blocks" },
{ TRUE, 'v', "typedef", "alias" }
};
@@ -96,6 +98,7 @@
{ "inout", K_PORT },
{ "in", K_PORT },
{ "out", K_PORT },
+ { "block", K_BLOCK },
{ "alias", K_ALIAS }
};
@@ -210,7 +213,7 @@ static void findTag (vString *const name)
vStringCopyToLower (Keyword, name);
lookupKeyword (vStringValue (Keyword), Lang_vhdl);
kind = (vhdlKind)lookupKeyword (vStringValue (Keyword), Lang_vhdl);
- if (kind == K_PROCESS || kind == K_PORT)
+ if (kind == K_PROCESS || kind == K_BLOCK || kind == K_PORT)
{
makeSimpleTag (Lastname, VhdlKinds, kind);
}
@@ -233,7 +236,7 @@ static void findTag (vString *const name)
c = vGetc ();
}
}
- else if (kind == K_PROCESS) {
+ else if (kind == K_PROCESS || kind == K_BLOCK) {
vStringCopyS(TagName,"unnamed");
makeSimpleTag (TagName, VhdlKinds, kind);
} else {
@@ Diff output truncated at 100000 characters. @@
--------------
This E-Mail was brought to you by github_commit_mail.py (Source: TBD).
More information about the Commits
mailing list